The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Previously, the electronics devices are always integrated into a rigid substrate. Itpsilas stronger, but hardly compatible with Bio-tech or some implanted systems for human being whose packaging point should be more focusing on the flexibility or even the stretchability. Not only the packaging of the active devices but also the connections among them need to be more flexible. In other words, as to...
This paper brings into light a new ultra-thin and highly flexible package with embedded active chips. In this technology, no supporting and permanent substrates were needed. Copper foil was used as temporal substrate, and it became the bottom circuit after patterning and etching processes. Ultra-thin chips with 20~25 mum thickness were assembled directly on the structured copper foils in a flip-chip...
Wafer level chip stacked module by embedded IC packaging technology was studied in this paper. Wafers were treated to less than 50 mum thickness and then singulated. The prepared thin chips were stacked on to the base wafer and then embedded by dielectric layers (Ajinomoto build up film, ABF) lamination. Vias to both the pads on the analog chips and digital wafers were done by UV laser drilling process...
The structure of chip-in-substrate package, CiSP, is shown. The thin chips (50mum) are bonded on the organic substrate (BT) flatly. Subsequently, the chips are covered among the build-up dielectric layer, which can be either a RCC (resin coated copper) material or an organic dielectric material (ABF) by a lamination process. Via holes on the chip's I/O pad and substrate are drilled by laser. The interconnection...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.