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Network on Chip (NoC) has emerged as an interconnection solution for the modern digital systems, especially for System on Chip (SoC), due to the large number of IPs in the system that need to communicate. Various systems and routers have been introduced; hence the need to make a reusable verification environment to test both single routers and networks. In this paper, we propose a reusable verification...
Memory controllers are stated as the backbone ofdiverse architectures in the ASIC world. Among many concerns inenhancing the performance of the memory controllers is thetremendous verification process that consumes time, effort andresources. This paper proposes an optimized generic universalverification methodology (UVM) architecture to verify the flashmemory controllers. The architecture built is...
In contrast to past projections using conventional bus-based interconnections, the use of Network on Chip (NoC) as an interconnection platform has become more promising to solve complex on-chip communication problems due to what it offers from scalability, reusability and efficiency. Moreover, providing a suitable test base to inspect and verify functionality of any IP core is a compulsory stage....
Over the past decade, the increasing hardware design complexity uncovered the necessity for a justified and complete functional verification process. The implementation of a fast and reliable verification environment is both challenging and time-consuming. Accordingly, running the verification process in parallel with the design is a must as it also reduces the pressure of the time-to-market problem...
Tracking the test-plan progress of the direct testing methodology is a manual process. If the test-plan is complicated, the manual tracking effort is huge. In this paper, an automated functional coverage method is proposed to be used along with direct testing in order to automatically track the progress of the test-plan. To the best of our knowledge, it is the first time that functional coverage is...
In this paper, a novel common memory controller architecture is proposed. This common architecture includes the most major and important features for any manufacturer, these features can be enabled or disabled according to the manufacturer desire. This architecture can be utilized in any application according to desire of the manufacturer. Additionally, this architecture combines the advantages of...
This paper clarifies the differences between six memory architectures, which are Flex-OneNAND, Open NAND Flash Memory (ONFI 3.1), Embedded Multi-Media Card (eMMC v.5.0), Hybrid Memory Cube (HMC v.1.0) WideIO, and Universal Flash Storage (UFS). The paper shows the impact of such discriminating differences on choosing the most suitable architecture for certain application. The comparison is done in...
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