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This paper presents a low-power small-area open loop digital DLL. The DLL has open loop single replica block with duty cycle corrector (DCC), clock divider, pulse generator, 10-bit counter, and delay line. The DLL used for 2.2Gb/s/pin 2Gb DDR3 SDRAM is fabricated using 44nm DRAM Process. Experimental results show 1.1GHz operation frequency at 1.5V, and the measured total power and area savings in...
In this work, the first mu-strip 60 GHz Rotman lens and new compact low loss strip delay line using low temperature co-fired ceramic(LTCC) are proposed. The lens has 3 steering capability for +26deg, -26deg, 0.1deg angle, - 0.86 dB of side lobe level (SLL), and 28deg of half power beam width (HPBW). The Rotman lens is designed in mu-strip structure for integration capability with the system on package...
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