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Emerging Machine-to-Machine (M2M) applications demand small data packet sizes, very low latencies, and ultrahigh energy efficiencies. For all these reasons, Binary Bose-Chaudhuri-Hocquenhem (BCH) codes, which are very simple to implement, could constitute a good option to guarantee the required reliability of M2M transmissions. Nevertheless, existing delay and energy analyses of BCH decoders in the...
One of the main problem in transmitting coded data is that the decoder does not know the real number of errors to correct. This issue is critical since it means that the decoders spend much more iterations for correcting them. A paradigmatic case of this is the Bose-Chaudhuri-Hocquenghem (BCH) code. This type of code generally resorts to the Berlekamp-Massey algorithm to estimate the Error Locator...
In this paper we present ULANDreg testbed that consists of two European mask compliant impulse radio ultra-wideband (IR-UWB) transceivers with low data rate and medium range for data communication and distance measurement. The transmitter uses time hopping spread spectrum codes to reduce the peak to average ratio in the power spectral density and the receiver is based on a filter bank. The hardware/software...
In this paper we propose a method to implement SOM neural network in FPGA circuits: a self organized map neural network with on-chip learning algorithm. The method implies the building of a neural network by generic blocks designed in Mathworks' Simulink environment. The main characteristics of this solution are onchip learning algorithm implementation and high reconfiguration capability and operation...
In this paper we propose a method to implement in FPGA a feedforward neural network with on-chip delta rule learning algorithm. For this, we have develop a generic blocks designed in Mathworks' Simulink environment, capable to generate the signals for controlling the neurons from a neural network. The main characteristics of those blocks is its high reconfigurability that's makes it suitable for developing...
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