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With the expansion of the market of available embedded platforms the variety of target architectures is rapidly increasing. Therefore the need for retarget able software development tools has never been greater. The C compiler, probably the most significant development tool for embedded systems, is required to be quickly and easily adaptable for new architectures. This paper describes one such generic...
Future of the computer based systems resides in the multi-core and many-core architectures. Thanks to availability of different multi-core processors, many parallelization tools and techniques emerged. However, majority of them rely on the shared memory architecture model, where data to multiple core processors is simply accessible. In this paper we present a simple hardware abstraction that targets...
Transactional Memory (TM), a promising concurrency control mechanism that enables easier and more productive parallel/distributed programming, become a standard part of the latest multicores rolled out by IBM, Intel, AMD, and other IC manufacturers. Many TM aspects have been intensively researched, e.g. semantics of various possible implementations, TM safety and liveness properties, and TM performance...
Many instruction set simulation approaches place the retargetability and/or cycle-accuracy as the key features for easier architectural exploration and performance estimation early in the hardware development phase. This paper describes an approach in which importance of speed and controllability is placed above the cycle-accuracy and retargetability, thus providing a better platform for software...
Software systems based on service oriented architecture principles, which manage critical infrastructures, are typical environments where proper parallel data processing is one of the essential goals to achieve. Designers of such systems are normally expected to optimize the system performance and/or introduce new functionalities by evolving the existing system architecture. Our aim of this paper...
Smart Post-Processing (SPP) is a control algorithm for removing distortion in post-processing systems. Its most complex part is an audio quality improvement checkout routine. We have shown that even when using the simplest algorithm for this purpose results are satisfactory. On the other side it allows implementation of SPP on any commercial DSP platform, even with very restricted resources.
Massive parallel computing (MPC) originally appeared in the arena of multi-core processors and graphic processing units with parallel computing architecture. Nevertheless, most embedded software is still written in C, therefore C code parallelization is being subject of many ongoing R&D efforts. The most prominent approaches to parallelization of C code include Intel Cilk Plus, OpenCL, vfAnalyst,...
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