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We address the problem of statically checking control state reachability (as in possibility of assertion violations, race conditions or runtime errors) and plain reachability (as in deadlock-freedom) of phaser programs. Phasers are a modern non-trivial synchronization construct that supports dynamic parallelism with runtime registration and deregistration of spawned tasks. They allow for collective...
An intelligent resource manager is an essential part of platforms based on heterogeneous architectures. The resource manager should be able to accurately predict the future workload of the system at hand and take it into consideration for making decisions. In this paper, we study a large computer cluster and show that there exist patterns in the sequence of applications that each user runs over time,...
Platforms that are based on heterogeneous architectures require an intelligent resource manager. An intelligent resource manager should be able to accurately predict the future workload of the system at hand and take it into consideration. In this paper, we show that there exist patterns in the interarrival times of resource requests, and that these patterns can be used for modeling and prediction...
In response to the tremendous growth of the Internet, towards what we call the Internet of Things (IoT), there is a need to move from costly, high-time-to-market specific-purpose hardware to flexible, low-time-to-market general-purpose devices for packet processing. Among several such devices, GPUs have attracted attention in the past, mainly because the high computing demand of packet processing...
Using the analysis proposed in the previous chapter, several design optimization problems can be addressed. In the remaining part of the book we will address problems which are characteristic to applications distributed across multi-cluster systems consisting of heterogeneous TT and ET networks. In this chapter, we are interested in the partitioning of the processes of an application into time-triggered...
It is well known that event-triggered and self-triggered controllers implemented on dedicated platforms can provide the same performance as the traditional periodic controllers, while consuming considerably less bandwidth. However, since the majority of controllers are implemented by software tasks on shared platforms, on one hand, it might no longer be possible to grant access to the event-triggered...
Conclusions This chapter has demonstrated that dynamic voltage scaling can be efficiently exploited in the presence of CTG system specifications that model the functionality of data and control dominated applications. The introduced DVS technique exploits the slack time, taking into account the conditional behaviour of the CTGs. Voltage and performance are scaled in such a way that deadline constraints...
System-Level Design Techniques for Energy-Efficient Embedded Systems addresses the development and validation of co-synthesis techniques that allow an effective design of embedded systems with low energy dissipation. The book provides an overview of a system-level co-design flow, illustrating through examples how system performance is influenced at various steps of the flow including allocation, mapping,...
In this chapter we present an approach to mapping and scheduling for time-driven systems where processes are scheduled according to a non-preemptive static cyclic scheduling scheme, and communication uses a time division multiple access (TDMA) protocol. We accurately take into consideration the communication costs and consider, during the mapping and scheduling process, the particular requirements...
This chapter presents an approach to schedulability analysis and bus access optimization for multi-cluster distributed embedded systems consisting of time-triggered and event-triggered clusters, interconnected via gateways, as introduced in Section 3.5.
The previous chapters have presented analysis methods for communication-intensive heterogeneous real-time systems, taking into account the details of the communication protocols, in our case CAN and TTP.
The modeling and design of embedded systems can be performed at several abstraction levels. Gajsky [Gaj83] identifies the following abstraction levels in the context of CAD tools for VLSI: Circuit level is the lowest level of abstraction. For example, the hardware at this level is seen as transistors, capacitors, resistors, etc., and differential equations are often used to describe their...
In Chapter 5 we have discussed an incremental design strategy addressed to systems where both processes and messages are statically scheduled. However, as mentioned before, considering preemptive priority based scheduling for processes, with time triggered static scheduling for messages, can be the right solution under certain circumstances.
In the previous part of the book we have addressed the issue of non-preemptive static process scheduling and communication synthesis using the TTP as the communication infrastructure.
The first modern computers occupied entire rooms, had thousands of vacuum tubes, and dissipated hundreds of kilowatts of heat, but could only execute a couple of thousands of simple instructions per second [EBO3a]. Today, a complex microprocessor, which dwarfs the performance of the first electronic computers, can be integrated into a digital wristwatch.
In this and in the following chapter we consider time-driven distributed real-time systems that use the time-triggered protocol for their communication infrastructure, as described in Section 3.3. In this case, both the activation of processes and the transmission of messages are done based on the progression of time. The applications are modeled as a set of conditional process graphs, as presented...
Depending on the particular application, real-time systems can be implemented as uniprocessor, multiprocessor, or distributed systems. These systems can be hard or soft, event-driven or time-driven, fault-tolerant, autonomous, etc. A good classification of real-time systems is given in [Kop97a].
Embedded computer systems are now everywhere: from alarm clocks to PDAs, from mobile phones to cars, almost all the devices we use are controlled by embedded computers. An important class of embedded computer systems is that of hard real-time systems, which have to fulfill strict timing requirements. As real-time systems become more complex, they are often implemented using distributed heterogeneous...
Embedded systems (ESs) have been widely used in various application domains. It is very important to design ESs that guarantee functional correctness of the system under strict timing constraints. Such systems are known as the real-time embedded systems (RTESs). More recently, RTESs started to be utilized in safety and reliability critical areas, which made the overlooked security issues, especially...
Modern mobile devices provide ultra-high resolutions in their display panels. This imposes ever increasing workload on the GPU leading to high power consumption and shortened battery life. In this paper, we first show that resolution scaling leads to significant power savings. Second, we propose a perception-aware adaptive scheme that sets the resolution during game play. We exploit the fact that...
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