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A new STI-type FinFET structure with its body region been connected is demonstrated and characterized by using three-dimensional (3-D) numerical simulations. From the simulation results, the STI-type FinFET shows that the short-channel effects (SCEs) and the off-state leakage current are proved to be reduced because the threshold voltage (VTH) roll-off and the drain-induced barrier lowering (DIBL)...
In this study, we propose a novel bulkSi-based device called dual-channel body-tied (DCBT) MOSFET using the self-aligned process without any extra masks. It reveals that our proposed DCBT FET has excellent S.S., decreased Isd,leak, lower Rsd, reduced Jg,limit, smaller lattice temperature, and higher thermal stability when compared with its DC counterpart. And, for the first time, we will investigate...
A self-aligned novel S/D tie SOI device is presented for the first time in the field of silicon on insulator technology. The new device having thick-body and body-passway is demonstrated to improve the self-heating effect and decrease the parasitic source/drain resistance. When the source/drain-tie length is too small or too big, the negative differential conductance behavior can be observed. It can...
We demonstrate thermal stability of PTGVMOS (Pseudo Tri-Gate Vertical MOSFET) with native-tie on bulk Si wafer. For comparison three types of structure are designed. According to 2D simulation, our proposed structure show excellent thermal stability, such as the lattice temperature in the drain-on-top configuration and drain-on-bottom configuration were improved 50% and 66.6% respectively. The fabricated...
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