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Microelectromechanical relays have recently been proposed for ultra-low-power digital logic because their nearly ideal switching behavior can potentially enable reductions in supply voltage (Vdd) and, hence, energy per operation beyond the limits of MOSFETs. Using a calibrated analytical model, a sensitivity-based energy-delay optimization approach is developed in order to establish simple relay design...
A 4-terminal (4T) relay technology is proposed for complementary logic circuit applications. The advantage of the 4T relay design is that it provides a means for electrically adjusting the switching voltage; as a result, a 4T relay can mimic the operation of either an n-channel or p-channel MOSFET. Fabricated 4T relays exhibit good on-state current (Ion > 700 ??A for VDS = 1 V) and zero off-state...
Power consumption has grown to be the dominant challenge for continued CMOS scaling. This issue can be traced directly to the fact that the thermal voltage kBT/q does not scale, limiting the extent to which the MOSFET threshold voltage and hence the supply voltage (f/dd) can be scaled. To circumvent this limit, alternative switching device designs [1,2] which can achieve <60 mV/dec subthreshold...
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