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Write reliability is one of the major challenges in design of spin-transfer torque random access memory (STT-RAM) caches. To ensure design quality, error correction code (ECC) scheme is usually adopted in STT-RAM caches. However, it incurs significant hardware overhead. In observance of the dynamic error correcting requirements, in this work, we propose Sliding Basket - an adaptive ECC scheme to suppress...
Spin-torque transfer RAM (STT-RAM), a promising alternative to static RAM (SRAM) for reducing leakage power consumption, has been widely studied to mitigate the impact of its asymmetrically long write latency. However, physical effects of technology scaling down to 45 nm and below, in particular, process variation, introduce the previously unreported and alarming trends in read performance and reliability...
Multi-level cell Spin-Transfer Torque RAM (MLC STT-RAM) greatly suffers from the significantly degraded operation reliability and high programming cost. In this paper, a novel MLC design, namely ternary-state MLC (TS-MLC STT-RAM), is proposed for high-reliable high-performance memory systems by leveraging a cross-layer solution set. Based on the structure, several circuit and architecture schemes...
Spin-transfer torque random access memory (STT-RAM) has widely believed as a promising candidate for the post-silicon nonvolatile memory technology. In many recent researches, STT-RAM has demonstrated many attractive characteristics, such as nanosecond access time, high integration density, adjustable non-volatility, and good CMOS process compatibility. As the distinction between the two boundary...
Spin-transfer torque random access memory (STTRAM) is a promising candidate for next-generation non-volatile memory technologies. It combines many attractive attributes such as nanosecond access time, high integration density, non-volatility, and good CMOS process compatibility. However, process variation continues to be a critical issue in the designs of STT-RAM and the derived spintronic logic....
Spin-transfer torque random access memory (STT-RAM) is a promising nonvolatile memory technology aiming on-chip or embedded applications. In recent years, many researches have been conducted to improve the storage density and enhance the scalability of STT-RAM, such as reducing the write current and switching time of magnetic tunneling junction (MTJ) devices. In parallel with these efforts, the continuous...
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