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High-rate communications technology leveraging the unlicensed spectrum around 60 GHz is almost ready for deployment with several demonstrations of successful wireless links. One key aspect of the transceiver is the ability to handle analog fractional bandwidths in the order of 20%, challenging for both the linear processing chain and the frequency reference generator. In classical LC loaded stages...
A 65 nm CMOS sliding-IF receiver comprising 3 LNA gain stages, RF mixer, quadrature IF mixers, VCO and dividers is presented. Coupled resonators, both in the LNA and RF mixer, allow an important gain-bandwidth extension over conventional single LC neutralization. Realized prototypes show >13 GHz RF bandwidth around 60 GHz, <6.5 dB NF, -21 dBm P1dB, 12.6% VCO frequency range, and -115 dBc/Hz...
Performance of standard CMOS implementations has proved sufficient up to 60 GHz range and examples of operating blocks even beyond 60 GHz have been presented. Still, the choice of the receiver architecture entails several peculiar considerations in order to achieve a robust low-power solution. On the other hand, at high frequencies, to save power in both the VCO and dividers, it is desirable to synthesize...
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