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This paper presents a real-time voltage sag monitoring system. Discrete wavelet transform (DWT) is implemented by using an embedded chipset in order to monitor initial and ending points of voltage sag. A flywheel energy storage system (FESS) is designed for voltage sag compensation, and proof-of-principle experiment is presented.
Evaluating coding efficiency in early coding stage is important in modern RDO compression methods. Bit-plane coding algorithms such as SPIHT are widely used in many scalable coders. The locality of a spatial-oriented tree (SOT) affects the coding efficiency of a SPIHT coder. In this paper, a fast algorithm is proposed to determine the numbers of bits to be consumed at all coding levels for a SPIHT...
Between 1992 and 1994, 64 Jyros bileaflet valves were implanted in 60 patients. There were 24 mitral valve replacements (MVR), including 3 re-do procedures and 6 additional procedures; 32 aortic replacements (AVR) including 1 re-do and 11 additional procedures; and 4 double (combined aortic and mitral) valve replacements (DVR). The mean age of patients undergoing AVR was 58 (range 36-72) years,...
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