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In this paper we report on a high dynamic range Hydrogen sensor based on surface modified aligned ZnO hexagonal nanorods. ZnO nanorods were deposited by Chemical Bath Deposition (CBD) technique on SiO2 coated <100> p-Si substrate. The nanorods having average diameter of 250–300 nm and average length of 400–500 nm is then surface sensitized by Palladium (Pd) nanoparticles. After structural and...
In this paper the implementation of a low power high speed 4-bit Binary Search ADC (BS-ADC) is reported using 180 nm CMOS technology. The concept of Threshold Modified Comparator Circuit (TMCC) is introduced as a modification of the latch-based conventional comparators. The reported structure of the ADC occupies an active area of 0.0157 mm2 and consumes 127 µW of average power while operating with...
Optimization of power and speed is the most crucial issue for any low-voltage, low-power design. In this paper an Energy Efficient, Robust 18 Transistor (18T) 1-bit Full Adder (FA) cell, modified with the concept of Mixed Threshold Voltage (MVT) scheme, is reported. The entire design is done in 45nm technology, and compared to the conventional one, a considerable amount of reduction in the Average...
Most of the microheaters, which are used to elevate the temperature of gas sensor, integrated with the design of either platinum, nichrome or polysilicon as heater element suitable for high temperature (400–700°C) regime. This paper describes the structural design and electrothermal analysis of a microheater array to find out the thermal characteristic with different bias voltages. The standard meander...
In this paper, the detailed methane sensing characteristics of Pd-Ag/ZnO/Ni-alloy based Metal-Insulator-Metal sensor structures on micromachined Si membrane is reported. The advantages of MEMS technology (like low power) have been successfully amalgamated with that of MIM structures (like fast and high response). A nickel alloy (Dilver PI) has been incorporated to fabricate the co-planar microheater...
InN is a material of huge potential in device applications. InN is grown on sapphire substrate. But due to the large lattice mismatch between the sapphire and InN, the large number of dislocations develops near the interface between the two materials. However, the density of threading dislocation falls sharply in the bulk layer. The charge density has also similar variation. So the bulk InN crystal...
This paper proposes an efficient design technique of high performance linear convolution of two finite length sequences using Multiple Channel CMOS technique. McCMOS technique uses non-minimum length transistors which offer the possibility of achieving excellent leakage control in nano-scale CMOS design with a very modest increase in area and switched capacitance. This paper approaches the linear...
Reliability characteristics of TaAlOx high-k dielectric MIM capacitors are reported. TaAlOx films have been deposited by RF co-sputtering of Ta2O5 and Al2O3 targets at a low substrate temperature. A high capacitance density and a low value of VCC (voltage coefficients of capacitance) have been achieved. Degradation kinetics in TaAlOx-based MIM capacitors have been studied under constant current stressing...
In this paper, we derive an analytical model of drain current for an Undoped 4-T asymmetric double gate MOSFET based on the solution of the 1D Poisson's equation. The equations are valid for both the subthreshold and superthreshold regime of operation. The current is formulated using the Pao-Sah's double integral method. The model can be used to study the effect of the different gate voltages, gate...
Advanced metal-insulator-metal (MIM) capacitors with ultra-thin (EOT~2.1-4.9 nm) RF sputter-deposited HfAlOx dielectric layers having excellent electrical properties have been fabricated. The capacitance density is found to increase with the decrease in thickness of insulator film. MIM capacitors show little voltage and frequency dependence along with low dissipation and leakage current. Our experimental...
Nowadays there is a strong demand for higher speed, low leakage, low power and low noise SRAM cell to develop a high speed memory. In this paper conventional 6T SRAM has been replaced by a 8T SRAM circuit. The access transmission gates (access TG 1 & access TG 2, shown in Fig 2) have been used instead of simple pass transistors to reduce leakage current. The lower power consumption, lower leakage...
Advanced metal-insulator-metal capacitors with ultra thin (EOT-2.3-5.3 nm) RF sputter-deposited TaAlOx dielectric layers having excellent electrical properties have been fabricated. With low FCC value, the small change in quadratic VCC value in hysteresis curve is also found which shows a good stability of MIM capacitor. The Weibull distribution function, which is based on the weakest-link theory,...
We have developed analytically a threshold voltage model and explored the threshold voltage roll-off and drain-induced barrier lowering (DIBL) effects for undoped surrounding-gate (SG) MOSFETs. The model is derived by applying the Gauss law by considering an elemental area of the channel rather than using Poisson equation as implemented earlier. For this threshold voltage model, the threshold voltage...
We have developed an analytical subthreshold drain current model along with subthreshold swing for surrounding gate (SG MOSFET) MOSFETs. The model is derived from direct use of the Gaussian law rather than using Poisson equation as has been implemented earlier. The models for current and swing have been verified by comparison with 3-D numerical results for different channel lengths, channel thickness...
Rapid thermal oxidation (RTO) of heteroepitaxial thin Si1-xGex layers (x=0.85) at 815??C in dry O2 has been studied. We have investigated the origin of interface defects in Si0.15Ge0.85/SiGeO2 RTO oxides by electron paramagnetic resonance (EPR) through internal photoemission (IPE) technique. Spin concentration of the paramagnetic defect centers have been determined from EPR results. After IPE capacitance-voltage...
A full adder circuit is one of the basic building blocks of a digital design. In general it is made by CMOS technology. In the CMOS technology the full adder is built by 28 transistors. So, the transistor count is very high. The average power consumption, leakage power consumption and delay is very high. In this paper we made a new circuit which is made by mainly the transmission gate (TG) technology...
This paper presents a compact threshold voltage model for narrow channel MOSFETs for the purpose of VLSI circuit simulation. A nano-scale trench isolated MOSFET has been considered whose gate length and width are in the sub 65 nm regime. The developed model has been validated by comparing the results predicted from the derived model with those obtained using the device simulator of TCAD Sentaurus.
An analytical subthreshold surface potential model for Dual Material Gate MOSFET including the effect of inner fringing field is presented, considering surface potential variation with the depth of the channel depletion layer. A pseudo two dimensional method is adopted and a more accurate prediction of surface potential including the fringing field effect is reported.
The dielectric study of HfO2 thin films deposited on the platinized silicon substrate using RF-sputtering deposition technique have been carried out in the metal-insulator-metal (MIM) configuration over a wide temperature (300 to 500 K) and frequency (100 Hz to 1 MHZ) ranges. The film were deposited at pre-optimized sputtering voltage of 0.8 kV, substrate bias of 80 volt and annealing temperature...
In this paper we have presented a physical implementation of a topology control algorithm for MANETs. Mobile nodes follow the characteristics of the nomadic community mobility model. The proposed algorithm maintains the topology without any control message. There is no need to change routing table as connectivity of the network is maintained all through. Every node in the network is free to travel...
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