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Multiprocessor systems-on-chips (MPSoCs) are defined as one of the main drivers of the industrial semiconductors revolution. They are good candidates for systems and applications such as multimedia. Memory is becoming a key player for significant improvements in these applications (power, performance and area). With the emergence of more embedded multimedia applications in the industry, this issue...
Many-core platforms, providing large numbers of parallel execution resources, emerge as a response to the increasing computation needs of embedded applications. A major challenge raised by this trend is the efficient mapping of applications on parallel resources. This is a nontrivial problem because of the number of parameters to be considered for characterizing both the applications and the underlying...
Networks on Chip (NoCs) have emerged as the key paradigm for designing a scalable communication infrastructure for future Multi-Processors Systems on Chip(MPSoCs). An important issue in NoC design is how to configure a NoC-based architecture and how to map an application on this architecture in order to satisfy the performance and cost requirements. In this paper, we propose an approach that concurrently...
Multiprocessor system-on-a-chip architectures have received a lot of attention in the past years, but few advances in compilation techniques are targeting these architectures. This is particularly true for the exploitation of data locality. Most of the compilation techniques discussed in the literature for parallel architectures are based on single loop nest. However, most multimedia and image processing...
MPSoC interconnect architectures require new design evolution to absorb the high data rate of the future processor evolutions and to absorb the complex data flow of the next application generations. This paper details an interconnect architectural exploration in an MPSoC environment using a multimedia application: a medical imaging. This exploration take into account two opposite interconnect technologies,...
Multiprocessor systems-on-a-chip (MPSoCs architectures) have received a lot of attention in the past years, but few advances in compilation techniques target these architectures. This is particularly true for the exploitation of several level of memory hierarchy. Usually tiling is applied to one loop nest; in this paper we apply simultaneously loop fusion with two-level tiling to several loop nests...
In the near future, multi-processor systems-on-chip (MPSoC) will become the main thrust driving the evolution of integrated circuits. MPSoCs introduce new challenges, mainly due to growing communication through their interconnect structure. Current electrical interconnects face hard challenges to overcome such data flows. Integrated optical interconnect is a potential technological improvement to...
In today's embedded systems, the memory hierarchy is rapidly becoming a major factor in terms of power, performance and area. This is especially true for embedded multimedia applications using temporary multi-dimensional arrays that are typically used to store intermediate results during multimedia processing. In this paper, we introduce a new buffer allocation method to replace these temporary arrays...
In today's embedded systems, memory hierarchy is rapidly becoming a major factor in terms of power, performance and area. This is especially true for embedded multimedia applications using temporary multi-dimensional arrays that are typically used to store intermediate results during multimedia processing. In this paper, the authors propose a new technique that optimizes the use of caches and registers...
Multiprocessor system-on-chip is one of the main drivers of the semiconductor industry revolution by enabling the integration of complex functionality on a single chip. Memory is becoming a key player for significant improvements in embedded systems (power, performance and area). With the emergence of more embedded multimedia applications in the industry, this issue becomes increasingly vital. These...
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