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This paper proposes a methodology for circuit simulation of parasitic effects caused by minority carrier injection into the substrate of a deep-trench based BCD technology. An equivalent circuit is used containing pre-calculated macro models for the injecting diode, the substrate of the chip and the sensitive diode. The macro models are generated by means of TCAD simulations which determine the carrier...
To model NPN-transistor behaviour at high currents or high frequencies, an exact description of base resistance is needed. In this paper a new method for base resistance calculation is presented, that takes into account three-dimensional physical effects at high currents. A distributed equivalent circuit is generated for each NPN-transistor layout using the finite element method. Calculating the power...
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