The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Increasing demand for higher display resolution, greater color data depth, and narrower frame has resulted in increased requirements for higher data rates between the host controller and multiple display driver ICs through fewer transmission channels. To meet these requirements, a clock-embedded interface for LCD displays is presented in this paper. Only one pair of differential 2.0Gb/s serial data...
A 2.0 Gb/s clock-embedded interface for LCD drivers, Advanced-PPmL??, has been developed for high-speed data transfer and reduced area in transmission media. Only one pair of differential signals is needed to control the LCD driver and to display images. A newly developed 1/5-rate phase frequency detector helps achieve a 25% power reduction compared with a half-rate architecture. Pulse filtering of...
An in-field real-time successive jitter-measurement macro is developed. It features interpolated jitter oversampling and feedforward calibration that help attain 1ps resolution and a hierarchical Vernier jitter-measurement technique that exploits the trade-off between rms and deterministic jitter measurement characteristics
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.