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Verification is one of the most critical stages in integrated circuit development. Given the current market conditions, a wise manner to improve verification results would be concentrating resources in error-prone modules. In this paper a novel method of attaching information to commit messages is introduced. Through the use of a simple and parseable language, important and more accurate statistics...
Verifying large industrial designs is getting harder each day. The current verification methodologies are not able to guarantee bug free designs. Some recurrent questions during a design verification are: Which modules are most likely to contain undetected bugs? In which modules the verification team should concentrate their effort? This information is very useful, because it is better to start verifying...
In this paper we propose a new reconfigurable architecture for sensor nodes, called RANS-300, which can operate in applications demanding low power to high performance, although sacrificing the lifetime of the sensor node. This node has a FPGA board, which can be dynamically reconfigured to add new configuration, and has a Compact Flash device to expand the node possibilities
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