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A non-quasi-static (NQS) model accounting for intrinsic carrier propagation delays in both B/E and B/C junctions is implemented in the ASTAP circuit simulator to evaluate the impact of non-quasi-static effects in saturated bipolar circuits. It is shown that while the extra delay introduced by the NQS effects during the turn-on transition is primarily due to the normal mode B/E NQS time constant, the...
The author presents a high-speed low-power NTL (non-threshold-logic)-based push-pull circuit featuring a complementary emitter-follower driver. Compared with the standard NTL circuit, this circuit offers a much better balance between the pull-up and pull-down delay, improved scalability, and superior load driving capability. Simulation results based on a 0.8-μm double-poly self-aligned complementary...
The authors present a single-poly bipolar technology using an advanced transistor with an LDD (lightly doped drain)-like self-aligned lateral profile. The device is isolated by a silicon-filled deep trench with a collector-to-collector breakdown voltage of 33 V, and the field oxide is provided by a low-temperature breakless process. The integrated process yields a structure with minimal topography,...
The author presents a detailed two-dimensional numerical simulation study on the performance degradation caused by the extrinsic base encroachment in advanced narrow-emitter bipolar circuits. It is shown that depending on the circuit families used, the extrinsic base encroachment results in distinct effects on the operation and performance of the circuits. The design considerations and scaling implications...
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