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Graphene barristor, in which a Schottky barrier formed between graphene layer and silicon layer can widen the bandgap with the control of gate voltage, is a promising method to enhance on/off current ratio in digital circuit design. In this work, a theoretical study is presented based on analog behavior modeling in SPICE. We have developed a compact device model to evaluate the performance of graphene...
Silicon-based Static Random Access Memory (SRAM) has not been keeping pace with technology trends due to the limited improvements in power, performance and density. This paper explores graphene based SRAM as a potential replacement of silicon SRAM for future digital electronics. Due to its higher current on-to-off ratio, the graphene nanoribbon field effect transistor (GNRFET) has been considered...
This paper presents non-EDA based design simulation using Simscape for graphene based nanoelectronic systems. The objective of this paper is to explore ultra-fast design for analog devices using substitutes to conventional but time intensive EDA simulations such as SPICE. A GFET behavioral model is presented where the model is based on the drift-diffusion conduction mechanism of the dual-gate device...
The lack of well defined abstraction levels and immature design tools have made the custom design and optimization of analog circuits slow, complex and laborious. Furthermore, CMOS technology beyond 10 nm faces fundamental limits which may restrict its applicability for future devices. In this paper, a Graphene Field Effect Transistor (GFET) based cross-coupled LC circuit is used as case study to...
Graphene which is a single atom layer of carbon film with the interesting properties of high carrier mobility, high carrier concentration, high thermal conductivity, high velocity saturation, and reduced short channel effects, is emerging as a replacement of the ubiquitous silicon. This is particularly true for high-speed analog and radio-frequency electronics due to low Ion/Ioff ratio. In this paper,...
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