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Practical techniques for generating test signals between 10Gbps and 50Gbps are described. An historical review shows that the problem of extending ATE to higher rates has been around for several decades, with ever-increasing speed requirements. We demonstrate, in this paper that multiplexing techniques that permitted 40–50 Mbps testing in the 1980s (then using 10–20MHz ATE) can be applied to the present...
A multi-GHz arbitrary timing generator (ATG) design is described and demonstrated in a hardware prototype. The objective of the ATG is to realize ATE hardware that nearly matches the unlimited timing flexibility of software simulation tools. The ATG allows timing edges to be programmed at almost any desired point within the test, with minimal constraints. The delay of every edge can be changed on...
This paper introduces a novel Timing Generator Format Controller (TGFC) circuit that produces programmable multi-gigahertz signals with "timing-on-the-fly" capability. For the first time (we believe), timing edges can be programmed to occur at almost any point during the test, limited only by a minimum pulse-width (~70ps) and maximum sustainable data rate (~3.2Gbps in the prototype). Timing...
In 2009 IMS3TW we presented a “Development Platform” for prototyping new multi-GHz ATE [1,2,3]. At that time, a complete multi-channel 2.5 Gbps (per channel) test system was shown as the first application of the Development Platform. In this configuration, 9 transmitter channels (TX) and 9 receivers (RX) were used to test an all-optical Dense Wavelength Division Multiplexing (DWDM) switching network...
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