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This paper presents a low-power generic readout circuit for capacitive and resistive complementary metaloxide- semiconductor (CMOS) micro-electro-mechanical-system (MEMS) sensors. This readout architecture can be scaled to even more sensors to achieve chip area and power consumption efficient. An incremental sigma-delta analog-to-digital converter (ΣΔ ADC) is used for providing multiplexed digital...
This paper presents a digital trimming technique for canceling the output offsets caused by sensor mismatches in an accelerometer design. The offset cancellation techniques provide fine trimming steps with higher chip area efficiency compared with that of conventional capacitor array compensation approaches. The accelerometer, fabricated in a 0.18- complementary metal-oxide-semiconductor...
This paper proposes a 3rd-order low-distortion delta-sigma modulator (DSM) structure, which uses the timing-sharing technique between the 2nd and 3rd integrators during one clock phase. Further, since the operation phase of the 1st integrator is different to those of the 2nd and 3rd integrators, the three integrators are realized in just single opamp by the opamp sharing. Therefore, the power consumption...
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