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This paper presents a 12-bit 2 GS/s dual-rate hybrid DAC using bandwidth- and linearity-enhancement techniques. The proposed pulsed-error pre-distortion scheme enhances DAC linearity at both low and high signal frequencies by leveraging the fine time-and-voltage resolution from the oversampling path of the hybrid DAC structure. To further widen the DAC bandwidth, a noise-cancellation scheme is proposed...
A 12-bit Hybrid DAC architecture with split Nyquist (1GS/s) and delta-sigma modulator path (8GS/s) has been proposed and implemented in 65nm CMOS. Based on the hybrid architecture, the delta-sigma assisted pre-distortion scheme compensates for the current steering cell mismatch that further reduces the analog circuit complexity and area. The proposed 8X unrolled pipeline delta-sigma modulator allows...
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