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For a 2.5W speaker in tablets, the proposed adaptive power management (APM) system can deliver a pseudo high power of 3.2W with a ±4V supply because it suppresses 0.7W power on tones that may damage a 2.5W speaker and escape the notice of human ears. With z-domain digital signal processing (z-DSP) and psychoacoustic model, high efficient power management and high sound quality can be achieved simultaneously...
A buck/boost supply modulator (BBSM) is proposed for 4G LTE RF power amplifier (RF-PA) envelope tracking applications. The H-bridges used in non-inverting buck/boost converters are metamorphosed into the current sources and switches of a 4-bit current-steering DAC-like supply modulator. Fast tracking speed is achieved through its inherent open-loop topology, while the direct digital interface provides...
A 2.4 GHz linear CMOS power amplifier (PA) for OFDM WLAN application in 65 nm CMOS technology is presented. The cascode PA operating from 3.3 V employs the proposed asymmetric lightly doped drain MOSFET (A-LDD) structure as common-gate stage to sustain large signal stress and 1.2 V core device as common source stage to provide high frequency operation. Beside, dynamic bias technique is used not only...
A fully integrated transmitter front end with on-chip power amplifier (PA) in 0.18 um CMOS technology is presented. The on-chip PA employs dynamic bias technique to reduce power consumption and enhance linearity. In the measurement, it reveals the output PldB of the PA is 26.5 dBm. Also, the transmitter delivers an average power of 17.3 dBm with EVM of -28.1 while drawing 225 mA of DC current (PA...
A low-power full-band 802.11abg transceiver in 0.15mum CMOS technology is presented. It shows 4.4/4dB low noise figures in 2.4/5GHz receiver chains. An on-chip PA (power amplifier) delivers 20dBm output P 1dB -40 to 140degC operation temperature is achieved by sensing technique. On-chip power detector and transmitter to receiver feedback loop estimate I/Q imbalance, and a new I/Q compensation scheme...
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