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An equivalent circuit model for multilayer power planes with multiple via arrays is proposed. The complexity of the actual geometry is greatly reduced in the circuit model with the accuracy maintained. The model is corroborated by measurements.
A hybrid approach to solve via impedance and model via transitions is presented in the paper. The method is a combination of via-plane capacitance extraction and the impedance matrices calculation of parallel plane pair. A new formulation of the integral equation method for axially symmetric geometry is used for the capacitance extraction. The method is validated with other model results.
Vias are typical discontinuities for high-speed signal transmission in printed circuit boards. Previous work has studied the through-hole via connections from the top layer to the bottom between microstrip traces and proposed an equivalent transmission-line model for impedance matching between traces and vias. In this paper, the equivalent transmission-line model is extended for the via structures...
Widespread use of the Web 2.0 Internet applications such as video streaming and social networking are continuously demanding higher bandwidth network equipment. Electrical designers increasingly face more and more challenges to deliver higher speed products within short development cycle due to design complexity and new multi-GHz signal integrity problems. This paper presents a modeling and simulation...
IC switching current is the main noise source of many power integrity issues in printed circuit boards. Accurate measurement of the current waveforms is critical for an effective power distribution network design. In this paper, using a giant magnetoimpedance (GMI) probe for this purpose is studied. A side-band detection and demodulation system is built up to measure various time-domain waveforms...
In power distribution network (PDN) modeling, interconnection inductance can play a critical role. It often determines the effectiveness of a component, such as a decoupling capacitor. This paper studies a typical one-plane-pair PDN structure with parallel power and ground planes and vertical vias in between. This work improves the conventional lumped circuit model for the PDN by introducing a model...
In this paper, a closed-form expression for the impedance of an infinitely large parallel plane pair is presented. It is applicable to practical printed circuit board (PCB) design problems where there are multiple shorting vias around the signal vias of interest. With the presence of multiple shorting vias, reflections from the plane pair edges can be neglected since the shorting vias prevent the...
In multilayer printed circuit boards (PCBs), vias are commonly used to connect traces on different signal layers. This paper derives the mixed-mode input impedance of differential vias in typical multilayer structures, and proposes to use the input impedance concept to achieve impedance matching at the via and trace connections. Effects of several geometrical parameters on the input impedance of differential...
When a high-speed signal transits through a via that penetrates a plane pair, parallel-plane resonances can cause additional insertion loss for the signal. To eliminate this via-plane coupling, ground vias are added adjacent to the signal via. This paper discusses the impact of the ground vias as a function of the number of the ground vias, their locations, and the size of the plane pair. A block-by-block...
This paper's goal is to help designers go through a step-by-step process to design the decoupling strategy for the charge supply. The distance to the decoupling capacitors, the number of decoupling capacitors, and the inductance associated with the connection of the decoupling capacitor to the power and ground-reference planes will all influence how much charge is delivered.
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