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A Ku Band (15∼18 GHz) 4-Element (4 Transmitters/4 Receivers) fully differential phased array transceiver is designed and fabricated using a 180nm CMOS process. The proposed phased array integrated with T/R switches and SPI controller is based on an all-RF structure. TX and RX channels are placed side-by-side to improve integration density and isolation. Each channel consists of a 5-bit phase shifter...
An ultra-wide locking range transformer-based injection-locked frequency divider (ILFD) is presented. By making use of a 4th-order transformer-based resonator and an inductive gain peaking technique, the proposed ILFD can achieve high performance in terms of wide locking range and low power consumption. Fabricated in a standard 65nm CMOS process with a core area of 0.18mm2, the ILFD measures a locking...
Based on establishing an assessment indicators system of innovation capability on high-tech industries, this paper applied an algorithm method on rough set theory to get weight of each indicators and made evaluation for capability of 7 main high-tech industries in 2014. The results showed that compared with the innovation input and output, the innovation efficiency was the biggest influence on the...
This Paper presents a highly-applicable supply modulator (SM) for WCDMA envelope tracking power amplifier (ET PA) system. An on-chip highly-linear envelope detector is employed so that no extra envelope signal from baseband is needed. The proposed SM chip reduces the complexity of ET technique application. It can be directly employed in transmitters without using other programming or elements. It...
This paper presents the design of a Ku-band CMOS low noise amplifier (LNA) with noise reduction and gain improvement. A transformer feedforward gm-boosting technique is employed in a single-ended common-gate LNA to reduce the noise figure (NF) and improve the gain simultaneously. A single cascode is the second stage of the LNA. Fabricated in 0.18um RF CMOS process, the LNA exhibits a minimum noise...
This paper presents a differential inverse class F power amplifier working in the 60GHz ISM band. Neutralized differential stacked structure is used in the power amplifier to get enough power gain and inverse isolation. The output harmonic waves are controlled by using the transformer and resonance branch to improve the peak power added efficiency (PAE). The proposed power amplifier achieves a maximum...
A complete analytical model, which includes pad coupling and interconnection effects, is presented in this paper. In the model, the pads coupling through the substrate is described by an RC network. And two paths of interconnection effect, one of which is through top metal transmission, while the other is through the substrate, are analyzed. Calculative and experimental scattering parameters are compared...
This paper summarizes the developments of millimeter-wave (mmW) CMOS power amplifiers (PAs) at University of Electronic Science and Technology of China in recent years. Harmonic control technology and inverse Class F technique are used to improve the power added efficiency (PAE) for mmW CMOS PAs effectively. Moreover, by realizing symmetrical voltage coupling between transformer primaries and secondary...
A 60-GHz vector summing phase shifter has been implemented in 90-nm CMOS. Using digital tunable current-splitting technique with π-type LPF and T-type HPF, a quadrature adjustable amplitude generator is developed to improve insertion loss and adjust quadrature signals' amplitudes. It has a high Q-factor passive I/Q signal network with wide phase range. In addition, a balun based current-reuse technique...
A fully-integrated differential cascode linear CMOS power amplifier (PA) with adaptive gate bias circuits is reported. The active bias circuits are employed to achieve a high linearity from a deep class-AB biased common-source stage. The gate bias of the common-gate stage is adapted to linearize the severe distortion of the deep biased amplifier at a low power region. An envelope signal is injected...
A 1.75GHz CMOS Doherty power amplifier (PA) is presented. This Doherty PA uses voltage combining method that is different from the conventional current combining Doherty amplifier based on HBT. The output transformer is employed to combine the output power and realize the load modulation. The proposed CMOS Doherty PA is fabricated in 180nm CMOS process. Simulation results show that the output transformer...
An envelope tracking CMOS power amplifier is implemented in 0.18-µm CMOS, and achieves a PAE of 34%, an EVM of 3.2%, and an ACLR of −32.5 dBc at an average output power of 26 dBm and a frequency of 1.8 GHz for a 10-MHz BW 16 QAM 7.5-dB PAPR LTE signal. The envelope tracking operation improves a PAE by 2% to 6.5% over the stand-alone PA for the LTE signal.
A 1.85GHz linear differential CMOS power amplifier with a printed board circuit based transformer is developed. A 2nd harmonic short circuit at an input is proposed to achieve high linearity. Simulation result shows that the third-order intermodulation distortion level decreases throughout the low and mid power regions, indicating that the 2nd harmonic short compresses the Cgs nonlinearity effectively...
A Doherty power amplifier (PA) for long term evolution (LTE) applications is fully integrated on a 1.4×1.4 mm2 die using a 2-µm InGaP/GaAs hetero-junction bipolar transistor (HBT) process. The quarter-wavelength transformer is the bandwidth (BW) limit of the Doherty PA. Other bandwidth limiting factors are analyzed and eliminated. A conventional phase compensation circuit and an additional offset...
A two-stage power amplifier (PA) and a supply modulator are designed and implemented for envelope-tracking (ET) operation to reduce dc power consumption. The supply modulator is connected to each stage of the PA and further enhances efficiency in a back-off power region. The envelope of a signal is reshaped to achieve good linearity and efficiency. The ET PA performs a power-added efficiency (PAE)...
A two-stage power amplifier (PA) and a supply modulator are designed and implemented for envelope-tracking (ET) operation to reduce dc power consumption. The supply modulator is connected to each stage of the PA and further enhances efficiency in a back-off power region. The envelope of a signal is reshaped to achieve good linearity and efficiency. The ET PA performs a power-added efficiency (PAE)...
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