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A highly manufacturable embedded DRAM technology at 40 nm node is presented. This report provides the characterization data of 128 Mbit embedded DRAM test vehicle fabricated by 40 nm eDRAM 200 MHz low power process. The test vehicle is composed of 32 macros and each macro unit is 4 Mb with configuration 32 k × 128 bits. The process is cost effective and compatible to our low power Logic core process...
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