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In this paper we have grown catalyst-free In(Ga)N nanowires and dot-in-nanowire heterostructures on (001) and (111) silicon substrates by plasma-assisted MBE. The nanowires grow in the wurtzite structure with c-axis in the direction of growth. HRTEM data indicate that the nanowires and dot-in-nanowires are defect free. The diameter of the nanowires can be varied from 50-100nm by varying the growth...
Charge trapping and wearout characteristics of self-aligned enhancement-mode GaAs nMOSFETs with silicon interface passivation layer and HfO2 gate oxide are systematically investigated at various time scales (from micro-seconds to seconds). Unlike high-kappa on silicon devices, both bulk trapping and interface trapping affect the PBTI (positive bias temperature instability) characteristics of nMOSFETs...
Research on high-k (HfO2) materials has been expanded significantly. However, MOSFETs with high-k gate dielectrics on silicon still have several problems with relatively low mobility of high-k devices in thin EOT regime compared to the universal curve. In this work, as an alternative of silicon substrate, InP and In0.53Ga0.47As has been studied. W e present the material and electrical characteristics...
Using a thin germanium interfacial passivation layer (IPL), for the first time we present surface channel n- and p-MOSFETs on GaAs substrate with TaN gate electrodes and HfO2 dielectric films. We used self-aligned and gate-last processes to fabricate MOSFETs on semi-insulating GaAs substrate. The electrical results from the buried channel and the surface channel-mode transistors are investigated....
In this work, using Si interface passivation layer (IPL) we present the electrical characteristics of TaN/HfO2/GaAs both p-and n-MOSFET made on GaAs substrates with excellent electrical and reliability characteristics, thin EOT (~2.3-3.0nm), low frequency dispersion (< 5%) and high maximum mobility (1213 cm2/V-s) with high temperature PMA for n-MOSFET on undoped GaAs. Good inversion behavior with...
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