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This paper reports new device trends of ultra-low power, ultra-low leakage, and ultra-low voltage for IoT applications. The SOTB technology achieves subthreshold leakage as low as 0.2pA/µm. Some device/circuit tricks for non-volatility and ultra-low voltage operation are reviewed.
We demonstrate a cost effective 65-nm SOTB CMOS technology for ultra-low leakage applications. Novel single p+poly-Si/Hf/SiON gate stack of mid-gap work function and precise GIDL control achieved ultra-low leakage of 0.2 pA/µm, which corresponds to approx. 100nA/chip (100k gate logic). Now the SOTB technology can provide three options from ultra-low voltage to ultra-low leakage that covers a wide...
Ultralow-voltage (ULV) CMOS will be a core building block of highly energy efficient electronics. Although the near- or sub-Vth operation is effective in reducing energy per operation of CMOS circuits, its slow operation speed can miss a chance to be used in many applications. The silicon-on-thin-buried-oxide (SOTB) CMOS is a strong candidate for the ul-tralow-power (ULP) electronics because of its...
We demonstrated record 0.37V minimum operation voltage (Vmin) of 2Mb Silicon-on-Thin-Buried-oxide (SOTB) 6T-SRAM. Thanks to the small variability of SOTB (AVT∼1.3 mVµm) and adaptive back biasing (ABB), Vmin was lowered down to ∼0.4 V regardless of temperature. Both fast access time and small standby leakage were achieved by ABB.
We demonstrated Silicon on Thin Buried oxide (SOTB) CMOS especially designed for ultralow-voltage (ULV) operation down to 0.4 V for the first time. Utilizing i) dual-poly gate stack with high-k having quarter-gap work functions best for the ULV CMOS operation, and ii) a novel “local ground plane (LGP)” structure that significantly improves short-channel effect (Vth roll off) without increasing local...
A mechanism of DeltaVth variation of NBTI for SRAM load transistor is examined. The variation data is in good agreement with our proposed model. A large fluctuation of NBTI for small size pMOS is not observed in HCI measurement for nMOS, which may be due to the difference of recovery. Two types of equations to get DeltaVth from DeltaIdL by OTF measurement are compared and we have concluded which equation...
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