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In this work we demonstrate the benefit of high uniaxial tensile strain on the performances of Si nanowire (NW) MOSFETs. High uniaxial tensile strained Si NWs were realized by exploiting a “bridge technology” based on patterning of an initial biaxial tensile strained Si on insulator (sSOI) into thin NWs with large pads. Strain relaxation on the large pads amplifiers the strain in the NWs. Strained...
In this work we demonstrate the benefit of high uniaxial tensile strain on the performances of Si nanowire (NW) MOSFETs. High uniaxial tensile strained Si NWs were realized by exploiting a “bridge technology” via patterning of an initial tensely strained Si on insulator (sSOI) into thin NWs with large relaxed pads, functionalized as stressors. Strained Si NW-arrays along <110>/(100) direction...
Recent experimental results on Si nanowire MOSFETs are presented. The devices were fabricated in a top-down approach on unstrained and biaxial strained SOI substrates exhibiting good I-V characteristics with Ion/Ioff-ratios of 107 and off-currents as low as 10-13 A. Subthreshold slopes of about 70 mV/dec for SOI n- and p-FETs and 65 mV/dec for strained SOI n-FETs were obtained. The on-current and...
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