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In this work we take a control theoretic approach to the dynamic voltage/frequency scaling (DVS) in a MPSoC architecture with mixed pipelined/parallel processing. The aim is that of minimizing energy consumption with throughput guarantees. Theoretical analysis and experiments, carried out on a cycle-accurate, energy-aware, multiprocessor simulation platform, are provided. We give a dynamic model of...
In this work we take a control-theoretic approach to feedback-based dynamic voltage scaling (DVS) in multi processor system on chip (MPSoC) pipelined architectures. We present and discuss a novel feedback approach based on both linear and non-linear techniques aimed at controlling interprocessor queue occupancy. Theoretical analysis and experiments, carried out on a cycle-accurate multiprocessor simulation...
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