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There is an increasing demand in high-throughput mobile applications for programmability and energy efficiency. Conventional mobile Central Processing Units (CPUs) and Very Long Instruction Word (VLIW) processors cannot meet these demands. In this paper, we present a novel dynamically reconfigurable processor that targets these requirements. The processor consists of a heterogeneous array of coarse...
The main design requirements for high-throughput mobile applications are energy efficiency and programmability. This paper presents a novel dynamically reconfigurable processor that targets these requirements. Our processor consists of a heterogeneous array of coarse grain asynchronous cells. The architecture maintains most of the benefits of custom asynchronous design, while also providing programmability...
Through tailoring individual core to best fit dedicated applications, heterogeneous multi-core architectures can maximise performance while mitigating area costs and power consumption. This paper introduces heterogeneous multi-core architectures using coarse-grained dynamically reconfigurable processors. The multi-core system has been tailored for the performance intensive WiMAX transmitter. An exploration...
This paper presents a novel high-speed behavioural simulator (software-based emulator) for reconfigurable instruction cell based processors. These architectures are particularly suited to providing low-power, low-cost implementations of applications in a streaming environment, such as image signal processing, video playback, or base-band signal processing. As a result, many realistic applications...
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