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In this paper we discuss the possible use of chaotic signals for testing Analog to Digital Converters (ADCs). In detail, exploiting a chaos-based discrete-time noise generator, a method for generating test samples with a distribution arbitrarly close to the uniform one is proposed, and their use for the Code Density Test (also known as Histogram Test) of ADC is discussed.
In this paper, fully digital true random bit generators (TRBGs) targeting area-efficient FPGA implementations are analyzed and evaluated. In this analysis, a very general class of TRBGs is considered that is based on the well-known sampling oscillators used as a building block. A qualitative model is discussed and applied to derive simple design guidelines to implement low-area TRBGs. Extensive measurements...
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