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An embedded CMOS digital dual tuner for DOCSIS 3.0 and set-top box applications is presented. The dual tuner down-converts a total of ten 6 MHz Annex B channels or eight 8 MHz Annex A channels, for a maximum data rate of 320 Mb/s in Annex B and 400 Mb/s in Annex A mode. The dual tuner exceeds all the stringent SCTE 40 specifications over the 48-1004 MHz bandwidth, without using any external components...
This paper proposes a circuit structure which can improve signal-to-noise ratio of a conventional common-gate CMOS LNA for UWB (Ultra-Wide-Band; 3.1-10.6 GHz) using 0.18 um CMOS technology. The simulated results show that the proposed circuit has gain of 16.3-18.8 dB and NF of less than 3dB as well as good compatibility with input matching in a wide frequency range needed in UWB, and it consumes 16...
We address contact plug structure with low resistance applicable to NiSi system. It consists of thin barrier layer, prepared by NH3 plasma nitrization of PE-TiCU CVD Ti (PE-TiN/Ti) at process temperature of 450degC, and W-plug with B2H6 based nucleation layer. This process enables us to reduce contact resistance down to 50% without "volcano" type defect issues due to WF6 attacking.
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