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In this paper, an advanced joint jammer with deceptive jamming and blanket jamming is proposed for countering linear frequency modulated (LFM) radar. Multiple preceded and hysteretic false targets are produced by convolution operation and the blanket jamming is obtained by modulating the intercepted hostile radar signal according to pseudo-random sequences. The jamming algorithm is implemented on...
Convolutional neural networks (CNNs) have recently broken many performance records in image recognition and object detection problems. The success of CNNs, to a great extent, is enabled by the fast scaling-up of the networks that learn from a huge volume of data. The deployment of big CNN models can be both computation-intensive and memory-intensive, leaving severe challenges to hardware implementations...
Until now intelligent video analysis comprises a set of hardware, software and theoretical foundation, all intertwined for targets identification, location, tracking and even behavior forecasting from a scene with almost no human intervention, so as to facilitate people's daily management and resolve exceptional situations in good time. The moving objects detection is a fundamental process in an intelligent...
Real-time pedestrian detection and tracking are vital to many applications, such as the interaction between drones and human. However, the high complexity of Convolutional Neural Network (CNN) makes them rely on powerful servers, thus is hard for mobile platforms like drones. In this paper, we propose a CNN-based real-time pedestrian detection and tracking system, which can achieve 14.7 fps detection...
Speed-Up Robust Feature (SURF) is an effective algorithm for feature extraction. We propose a novel Scaled-RAM Interpolator (SRI) on FPGA to deal with the high complexity of SURF by introducing two methods. 1) Interpolation of Integral Image (I3) restores the sub-pixel details of image to improve matching precision, and halves the memory access to achieve acceleration; 2) Multi-Scaled RAM (MSR) normalizes...
Frequent Itemset Mining (FIM) is designed to find frequently occurring itemsets among a series of transactions. It is extremely memory and time expensive. Frequent Itemset Mining from a Data Stream (FIM-DS) is even more challenging since storing the infinite data to memory is infeasible. In recent years, researchers have proposed various approximation algorithms for FIM-DS. However, the computation...
Convolutional Neural Network (CNN) has become a successful algorithm in the region of artificial intelligence and a strong candidate for many applications. However, for embedded platforms, CNN-based solutions are still too complex to be applied if only CPU is utilized for computation. Various dedicated hardware designs on FPGA and ASIC have been carried out to accelerate CNN, while few of them explore...
In order to give more support to the research and development of large geophysical prospecting equipment like seismic prospecting instrument, this paper describes a design based on ADS1271 chip. The design applies to the large-scale cable digital telemetry seismograph and the development of distributed seismic acquisition unit of high precision but low power consumption, which uses high precision...
Deep learning, and especially Convolutional Neural Network (CNN, is among the most powerful and widely used techniques in computer vision. Applications range from image classification to object detection, segmentation, Optical Character Recognition (OCR), etc. At the same time, CNNs are both computationally intensive and memory intensive, making them difficult to be deployed on low power lightweight...
Developing heterogeneous system with hardware accelerator is a promising solution to implement high performance applications where explicitly programmed, rule-based algorithms are either infeasible or inefficient. However, mapping a neural network model to a hardware representation is a complex process, where balancing computation resources and memory accesses is crucial. In this work, we present...
Simultaneous localization and mapping (SLAM) is a key algorithm in localization tasks. Considering the limited payload and power on mobile robots, FPGA-based SLAM is a promising onboard solution. This paper presents an FPGA-based SLAM system, which can recover the indoor moving trajectory of the stereo cameras in real-time. We propose a low computational complexity VO-SLAM (Visual Odometry based SLAM)...
With the exponential growth of data size, data storage and analysis have been exposed to more challenges due to the lack of disk capacity and the limited network bandwidth. Data compression technique provides a good solution to mitigate these effects. In this paper, we propose a self-aware data compression system on FPGA for typical data warehousing, such as Hive, with column stored data and multi-threading...
This paper presents a field programmable gate array (FPGA) based 2-dimentional hand gesture recognition system using Haar feature Adaboost detector, skin color segmentation, and frame subtraction background modeling. The system obtains detection results and tracking results simultaneously. In addition, the interaction instructions are interpreted by a judgment strategy. The proposed system can complete...
Vertex-centric graph computations are widely used in many machine learning and data mining applications that operate on graph data structures. This paper presents GraphGen, a vertex-centric framework that targets FPGA for hardware acceleration of graph computations. GraphGen accepts a vertex-centric graph specification and automatically compiles it onto an application-specific synthesized graph processor...
A novel and real time FPGA skin color segmentation method is presented in this paper. Since most of the traditional skin segmentation methods have the problems of relatively large delay and complexity, they are not fit for real-time applications. To settle this problem, this paper proposes to use the Look-Up-Table (LUT) method for skin segmentation which has very fast operation speed. The method is...
Stereo vision is a well-known technique for acquiring depth information. In this paper, we present an FPGA-based real-time high-quality stereo vision system. By using AD-Census cost initialization, cross-based aggregation and semi-global optimization, the system provides high-quality depth results for highdefinition images. This is the first complete real-time hardware system that supports both cost...
Computing nodes in reconfigurable clusters are occupied and released by applications during their execution. At compile time, application developers are not aware of the amount of resources available at run time. Dynamic Stencil is an approach that optimises stencil applications by constructing scalable designs which can adapt to available run-time resources in a reconfigurable cluster. This approach...
In 3D FPGA designs, the circuit elements are distributed among multiple layers. Therefore, the partition strategies will influence the optimization of the entire design. Without the layout information, it is quite difficult to evaluate the effect of partitioning before placement. As a prior estimation model, re-convergence has shown its efficiency to estimate wire length before placement in 2D FPGA...
Placement is one of the most important techniques in modern field-programmable gate array design. Generally, analytical placement method optimizes the wire-length in global stage while allowing overlaps between blocks and is followed by a legalization step to remove all overlaps. In this paper, we propose a window based legalization method to remove all overlaps and place all instances at legalized...
Subsequence similarity search is one of the most common subroutines in time series data mining algorithms. According to previous studies, Dynamic Time Warping (DTW) distance is the best distance measurement in many domains. However, the high computational complexity of DTW distance makes it a critical bottleneck in many subsequence similarity search applications. In some applications, the performance...
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