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We present a low cost, single metal gate/high-k gate stack integration, which provides a very high performing NMOS coupled with a counter-doped PMOS for a 45nm low power (LP) CMOS technology. Inversion Tox (Tinv) values of 16Aring/18Aring (NMOS/PMOS) result in gate leakage current densities of 0.1/0.01 A/cm 2 and enable self-heated drive currents of 850/325muA/mum at 1nA/mum off-state leakage and...
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