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The analog-to-digital converter (ADC) is an essential component providing the interface between the sensed analog signal and the corresponding digital representation for a portable ultrasonic systems. In order to extend the battery life for the portable system, a low-voltage ADC is crucial for saving the power. However, the sensed analog signal is usually larger than the tolerable range of a low-voltage...
We have realized a 200GHz 4×4 focal plane array (FPA) by using super-regenerative receiver (SRR) pixels made of 65nm CMOS for mm-wave imaging applications. With 16 pixel elements constructed on PCB, the FPA consumes 215mA under 1V power supply. Such realization is made possible by carefully analyzing the super-regenerative interference (SRI) commonly observed in close-spaced SRRs and applying a newly...
Switched capacitors are commonly used in analog design. The circuit performance based on this technique relies on the accuracy of capacitance ratios, which are affected by random and systematic mismatches. To meet the accuracy requirement, designers can increase the layout area of unit capacitors to reduce random mismatch. Since increasing layout area enlarges the distance between unit capacitors,...
One of the most important issues during the analog layout phase is to achieve accurate capacitance ratios. However, systematic and random mismatches will affect the accuracy of the capacitance ratios. A common-centroid placement is helpful to reduce the systematic mismatch, but it still needs the property of high dispersion to reduce the random mismatch [10]. To deal with this problem, we propose...
With the understanding that an efficient optimization method is crucial to evolve effective gaits of a walking robot, this work investigates several integrations of well known optimization techniques, including Taguchi method, particle swarm optimization algorithm, and Nelder-Mead simplex method. Four benchmark nonlinear optimization problems are chosen for performance comparison. Numerical results...
This poster presents Power Scan, a design-for-testability for power switches in VLSI designs. It measures IR drop in function mode and detects leakage current in sleep mode. Power Scan reduces the test cost at the price of small area overhead.
As the speed gap between memory and disk is so large today, caching and prefetch are critical to enterprise class storage applications, which demands high performance. In this paper, we present our study on performance of a mid-range storage server produced by the Quanta Computer Incorporation. We first analyzed the existing caching mechanism in the server and then developed a fast caching methodology...
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