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HV n-/p-LDMOS devices with the source-side extending into bulk-region to evaluate the electrostatic-discharge (ESD) protection robustness by a TSMC 0.25 µm 60 V process are investigated in this paper. After a systematic analysis, the trigger voltage (Vt1) values of the n-LDMOS with the source-side extending into the bulk-end either by uniformly or non-uniformly distributed manners that had decreased...
In this paper, Electrostatic-Discharge (ESD) reliability study of 45-V HV pLDMOS devices with the source-side discrete islands is investigated. A pure pLDMOS transistor is always frail in ESD harms (It2= 0.107-A). However, if a pLDMOS device with two embedded SCRs (drain side npn-arranged); the corresponding It2 current can be upgraded to 0.644-A. Furthermore, as a pLDMOS-SCR (npn-arranged stripe...
In this work, a sub-10 nm high-κ/metal gate (HKMG) bulk fin-type field effect transistor (FinFET) devices with symmetrical N/PMOS characteristic were fabricated by a new hybrid dopant technology of plasma immersion ion implant (PIII) with traditional ion implant. This method was demonstrated to effectively reduce contact resistance and increase driving current of 18% in FinFET device. A remarkable...
A 100 W, 5.1-channel, single-chip, digital-input class-D audio amplifier with a low-voltage (LV) digital circuit and high-voltage (HV) switching power stage is designed for moderate-performance and cost-effective speaker systems. The LV portion, including multi-channel audio processors, delta-sigma modulators (DSMs), and pulse-width modulation (PWM) generators, is implemented with a standard CMOS...
Large supply bouncing due to the fast switching current and parasitic inductance of the supply rail may cause reliability and electromagnetic interference (EMI) problems, especially for ICs with the pulse-width modulation (PWM) technique, such as switching DC-DC converters. In this paper, a new slew-rate controlled (SRC) output stage is proposed to appropriately increase the rise and fall times of...
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