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Static random access memories (SRAMs) comprise an increasingly large portion of modern very large scale integrated (VLSI) circuits. The increasing importance of embedded SRAM is due to its low circuit activity factor, leading to low active power density, and productivity of design. The power consumption has become an important issue and has lead to the development of numerous schemes aimed at limiting...
The increasing market of mobile devices and battery powered portable electronic systems is creating demands for chips that consume the smallest possible amount of power. Static random access memories (SRAMs) consist of almost 90% of very large scale integrated (VLSI) circuits. The power consumption and speed of SRAMs are important issue that has lead to multiple designs with the purpose of minimizing...
SRAM cell design is driven by the need to satisfy static noise margin, write margin and read current margin (RCM) over all cells in the array in an energy-efficient manner. These constraints determine both the minimum cell size and supply voltage. RCM is set by the maximum read access time over the array. The randomness of transistor threshold voltages, and thus read times, makes maximum read time...
The gain-based technology mapping paradigm has been successfully employed for finding minimum delay and minimum area mappings. However, existing gain-based technology mappers fail to find circuits with minimal leakage power. In this paper, we introduce algorithms and modeling strategies that enable efficient gain-based technology mapping for minimum leakage power. The proposed algorithm is probability-aware...
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