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With the strength of fine pitch, high electrical conductivity and excellent reliability, copper pillar interconnect becomes a promising alternative to traditional solder bump. However, bad surface smoothness is a severe problem and significantly affects the reliability of the bump connection. In this paper, numerical simulations on the shape evolution of copper pillar bump and the effect of bump dimension...
The wettability evolution of eight different types of nanostructured cobalt films is investigated using galvanostatic electrodeposition. The morphology, which evolves from a plump, pea-like structure to cone, pyramid, shell, fluffy cone, fluffy shell and flower structures can be controlled by changing the anion type in the electrolyte or the deposition current density. A growth mechanism is proposed...
The superfilling of through silicon vias (TSVs) is a technical challenge for the fabrication of modern 3D Electronic packaging. In order to achieve void-free-filling for TSVs with different aspect ratios, various organic additives need to be added into the plating bath. Since TSV filling is a complex electrochemical and physical process, it is difficult and very time-consuming to get an optimal additive...
The superfilling of through silicon vias (TSVs) is a technical challenge for the fabrication of modern 3D Electronic packaging. In order to achieve void-free-filling for TSVs with different aspect ratios, various organic additives need to be added into the plating bath. Since TSV filling is a complex electrochemical and physical process, it is difficult and very time-consuming to get an optimal additive...
The kinetics which explained the copper Superfilling by electrodeposition was investigated since the copper electrodeposition became the standard technique for TSV. In order to interpret the bottom-up Superfilling process conveniently and exactly, a numerical model focused on the mass which can make the copper deposition in the via is built. This model only considered the effect of accelerator and...
The kinetics which explained the Copper Super-filling by electrodepostition was investigated since the copper deposition became the standard technique for TSV. A simple numerical model is built to explain the copper deposition process. Consider with the effect of the accelerator, a linear equation is built to explain the relationship between the exchange current density and the coverage of accelerator...
In response to lead-free requirements and market forces, pure tin finishes have been widely used as a Pb-free option for semiconductor lead frames and electrical connectors in the microelectronics industry. Pure tin finishes could easy have a discoloration during reflow process since the reflow temperature is as high as 260°C, which could lead to a reliability issue. In this work, matte tin was electroplated...
Co-Ni films are widely used in electronics industry for their excellent magnetic, mechanical and electrical properties. In this work, the influence of substrate type and deposition parameters on the morphologies of electroplating Co-Ni nanostructures was investigated. It was found that scallop shell-like Co-Ni depositions could be fabricated on copper wafers. The tendency to form the scallop shell-like...
Through silicon via (TSV) is a high performance technique to create 3D packages and 3Dintegrated circuits, compared to alternatives such as package-on-package, because the density of the via is substantially higher. The effect of current density and bath's organic additives on internal stress of copper electrodeposited from TSV filling methanesulfonate bath has been studied by Surface Profiler, X-ray...
With the increasing connection density of ICs, the technology of flip chip packaging and stacked-die packaging bounded by bumping are gradually replacing the traditional wire bonding to become one of the main styles of the package. And as one of the critical technology the technology of electroplating copper pillar wins more and more concern. This paper concerns about the influence of the electroplating...
Abstract-Chemithermomechanical pulping becomes an important development direction for pulp and papermaking industry. But the treatment of its effluent is very difficult because of its high concentration of organic pollutants and the deep color. In this study, eucalyptus chemithermomechanical pulp (CTMP) chemical pretreatment effluent was treated with electrocoagulation, and its treatment efficiency...
Though silicon vias filled by pulse reversal current, and influences of frequency of pulse current and reverse current density are investigated. Chronopotentiometry was applied to analyze the principle of these effects. It was found that when frequency is too high, the reverse current was mainly consumed in process of charge-discharge of electric double layer; it cannot play the role of dissolving...
Deep via filling is one of key technologies of 3D packaging. Vias are commonly filled by electroplating. Since cupric transportation in vias is limited by diffusion, Current density is one of the most influential factors for copper plating in vias. We investigated new additive of accelerator, suppressor and leveler. Simulation of the competitive adsorption ability of accelerator and suppressor at...
Three-dimensional packaging technology, which requires fine pitch and high density of solder bumps, has been developed recently for system-in-package applications. There are several methods being used for solder bumping process for now. As the sphere pitch decreases to below 100 mum, electrodepositing has an advantage over robotic ball placement and screen printing in the cost per ball, according...
This paper has explored the using of Cr micro-alloying method to enhance the corrosion resistance of Sn-Zn-Bi alloy. In addition, the influence of long-term aging on solder corrosion resistance has been studied. The electrochemical corrosion behaviour of Sn-8Zn-3Bi-XCr solder in 3.5% NaCl solution was investigated by using potentiodynamic polarization methods, scanning electron microscopy (SEM), energy-dispersive...
In this paper, sub-10 nm gate-all-around (GAA) CMOS silicon nanowire field-effect transistors (SNWFET) on bulk Si substrate are fabricated successfully for the first time with 13-nm-diameter silicon nanowire channel. On-state currents of 1494/1054 muA/mum at off leakage currents of 102/6.44 nA/mum are obtained for N/PMOS, respectively. The impacts of nanowire diameter (DNW) and gate oxide thickness...
Co-Ni alloys have the properties of high hardness, good wear and corrosion resistance. A transition layer of Co-Ni coating will help enhance the hydrogen sensing stability of Pd films. In this work, Pd films were electrodeposited on Co-Ni coated copper substrate and silicon wafers. The influence of deposition parameters on the microstructure of Co-Ni coatings and Pd films were investigated. Experimental...
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