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Electronic pre-equalization of chromatic dispersion for 43 Gb/s DQPSK has been demonstrated employing a developed test chip. The chip enables the BER in fibre with 2450 ps/nm of dispersion to be improved to 7.6E-05 without an optical dispersion compensator.
We demonstrate an error-free all-optical 2times10.7 Gb/s NRZ-OOK to 10.7 Gsymbol/s RZ-QPSK modulation format conversion using a newly developed integrated SOA three-arm-MZI wavelength converter module.
A Time-to-Digital-Converter (TDC) is to measure the interval time between two signals, and its time resolution of several pico seconds is achieved when it is implemented with advanced CMOS process [1-5]. Its applications are gradually expanding such as a phase comparator of all-digital-PLL, a sensor interface circuit, modulation circuit and demodulation circuit as well as a TDC-based ADC. The TDC...
This paper describes a new architecture for high-resolution digital PWM (DPWM) generator used in digitally-controlled DC-DC converters, PWM time resolution is determined by the difference between two (or more) gate delays, while that of conventional DPWM circuits is determined by gate delay itself. The proposed DPWM circuit can achieve fine time resolution with small circuits, and has low power consumption...
This paper proposes a novel PFC converter topology. The novel PFC converter is a buck-boost type and its output voltage is suppressed up to 200 V. As the result, the withstand voltage of any components can be reduced. That is possible to be higher efficiency and smaller size. Furthermore, the converter is easy to control when the converter operates in the discontinuous conduction mode (DCM). This...
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