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A low Vmin, 6T-SRAM is realized in 28nm FDSOI technology using read and write assist methods. We could reduce the Vmin of SRAM cell to 0.52V for the 0.120um2 high density 6T-SRAM. Reduced read margin of the SRAM cell is recovered using a transient rise in cell supply level through word-line coupling. Write assist is realized using application of PVT selective negative bit-line approach. Bit-line is...
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