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We propose an on-chip bias temperature instabilities (BTI) monitor by using standard cell based unbalanced ring-oscillator (RO). The monitor consists of NAND and NOR with extremely large difference in drive strength, which enables 4.2x sensitivity to BTI compared with normal INV based RO. This originates not only from accentuation of the degraded stage with small drive strength by the dominant delay...
In this paper, we present a novel compact model to calculate the product performance accurately. The compact model is constructed by leakage current and active speed calculation of logic circuit. It becomes possible to estimate marginal yield before pilot wafer by the input of a little Si information (Ring Oscillator frequency, leakage of transistor, wiring capacitance, transistor variability) to...
We propose a dynamic voltage-drop sensor, which is fully digital so that it is easy to design into products and use for testing. The 2.4K-gate GHz sensor exploits the difference in the voltage sensitivity between two paths composed of different types of standard cells. We have fabricated a test chip in a 28-nm HKMG process and confirmed its feasibility. This sensor can be used to evaluate optimal...
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