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In this paper the electrical and trapping characteristics of multilayer HfO2/Al2O3 dielectric stacks on silicon as a potential device for flash memory applications were investigated. Trapping phenomena have been studied by evaluating the memory window, i.e. the flat-band voltage shift of high frequency C-V curves after application of series of positive and negative voltages. The influence of post-deposition...
Negative bias temperature instabilities in commercial IRF9520 p-channel power VDMOSFETs under both static and pulsed bias stress conditions were studied. The pulsed voltage stressing caused generally lower shifts as compared to static stressing performed at the same temperature with equal stress voltage magnitude, as a consequence of partial recovery during the low level of pulsed gate voltage. Furthermore,...
The effects of electrical stress and post-stress recovery treatment (spontaneous and annealing) on gamma radiation response in power VDMOS transistors were investigated. It was shown that electrical parameters of electrically stressed devices, threshold voltage and channel carrier mobility, were more significantly recovered during annealing at 125°C as compared to spontaneous recovery at room temperature...
In this study we investigate NBTI in commercial IRF9520 p-channel VDMOSFETs under both static and pulsed bias stress conditions. The pulsed voltage stressing caused generally lower shifts as compared to static stressing performed at the same temperature with equal stress voltage magnitude, as a consequence of partial recovery during the low level of pulsed gate voltage. Recoverable and permanent components...
Conduction mechanisms in Hf-doped Ta2O5 stacks (7; 10 nm) under the constant voltage stress (CVS) are probed by the SILC analysis. The low field conduction is ascribed to trap-assisted tunneling, and the Poole-Frenkel effect dominates at medium and high fields. Stress affects the pre-existing traps and their energy levels, but does not create additional traps. The thinner layers exhibit better temperature...
Results of pulsed NBT stress-induced threshold voltage instabilities in p-channel power VDMOSFETs are presented and compared with static NBTI results. Optimal frequency and duty cycle ranges for application of investigated devices are proposed as well.
A brief overview of NBT stress-induced threshold voltage instabilities in p-channel power vertical double- diffused MOS field-effect transistors (VDMOSFETs) is presented. New approach in estimating the lifetime in NBT stressed p-channel power VDMOSFETs is proposed. The creation of lifetime surface for operating area, which can be useful for determination of device lifetime, operating temperature or...
The effects of spontaneous recovery on threshold voltage and channel carrier mobility in DC gate bias stressed power VDMOSFETs, as well as the underlying changes in gate oxide-trapped charge and interface trap densities, are analysed in terms of the mechanisms responsible. Various mechanisms, including drift of oxide-trapped charge to the SiO2-Si interface, charge neutralisation, interface trap redistribution...
Negative bias temperature instabilities (NBTI) are commonly observed in p-channel metal-oxide-semiconductor (MOS) devices when exposed to negative gate voltages at elevated temperatures. We present a brief overview of NBT stress- induced threshold voltage instabilities in p-channel vertical double-diffused MOS field-effect transistors (VDMOSFETs). NBT stress-induced threshold voltage shifts are fitted...
Threshold voltage shifts observed in commercial p-channel power VDMOSFETs during the NBT stressing are fitted using stretched exponential equation in order to estimate the device lifetime and discuss the impact of stress conditions and choice of extrapolation parameters. Excellent agreement found in later stress phases allowed for an accurate estimation of device lifetime for the lowest stress voltage...
Spontaneous recovery of threshold voltage and channel carrier mobility in DC gate bias stressed power VDMOSFETs, as well as the underlying changes in gate oxide-trapped charge and interface trap densities are presented and analysed in terms of the mechanisms responsible. A chain of mechanisms related to a presence of hydrogen species is proposed to explain the observed changes of oxide-trapped charge...
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