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This paper proposes low-distortion sinusoidal/two-tone signal generation techniques for analog/mixed-signal IC testing with a digital Automatic Test Equipment (ATE) using only single digital output pin. They provide a rectangular waveform approximated to a single-tone or two-tone with specified harmonics suppression; we can specify multiple harmonics to suppress using digital control, and it is followed...
Today, as LSI devices are increasingly more integrated resulting in larger number of package pins, high speed signal lines are more easily coupled to each other. Additionally, since multisite testing is required to reduce the cost of test, the transmission lines connecting these pins become even more concentrated. To measure these LSI devices, a huge number of high-speed transmission lines are required...
This paper proposes signal generator (BIST/BOST) algorithms and architectures for mixed-signal IC testing input. They can provide rectangular waveforms approximated to single-tone and/or two-tone signals with harmonics/IMD suppression. Their circuit consists of digital circuit, a 1-bit DA converter with an analog filter. Proposed method is simple for implementation with modest performance, compared...
This paper proposes a sinusoidal signal generator algorithm and architecture for mixed-signal IC testing input as well as quadrature detection circuit applications. It can provide a rectangular waveform approximated to a single-tone signal with harmonics suppression; we can specify the harmonics to suppress using digital control. Its circuit consists of digital circuit, a 1-bit DA converter with an...
This paper presents that the RC polyphase filter has characteristics as a complex analog Hilbert filter. Phase characteristics of the RC polyphase filter have the same as the Hilbert filter. Also its gain characteristics can be approximated as the Hilbert filter; as its order becomes higher, its gain characteristics become closer to the Hilbert filter. We have proved these for 1st to 4th RC polyphase...
This paper describes a digital method of reducing timing mismatch effects in time-interleaved ADCs used in ATE systems: we use cross-correlation among channel ADC outputs to detect channel timing skew, and make successive-approximation adjustments to our proposed linear-phase-digital delay filter to compensate for the timing skew. Simulation results validate the effectiveness of the proposed method...
Since recent wireless communication devices support multiple communication standards on a single chip, Error Vector Magnitudes (EVMs) for multiple standards are measured to evaluate the devices. The EVM is defined by the particular calculation methods of the communication standards, especially channel correction methods. Therefore the EVM value is different between standards, even if the modulation...
This paper describes timing skew adjustment techniquesin ATE systems (such as for timing skew compensation inn interleaved ADC system and an SSB signal generation system) using a digital filter with novel linear phase condition proposed in our ITC2010 paper. A conventional linear phase digital filter is an FIR filter with coefficients of odd- or even -- symmetry and whose group delay NTs/2 where N...
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