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In the Recent time, SRAM became a major componentfor many VLSI Chips due to big storage memory and low accesstime. Power Consumption is the major issue for design the SRAMCMOS design System on Chip. Power consumption also effects thechip design and Speed of the SRAM. In this paper, we propose 4TSRAM Cell which is able to reduce the power consumption andArea also. As we can see from the results session,...