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In this project, we propose to develop intermediate-scale quan tum computation devices and complement the hardware with device-aware compilers for the trapped-ion platform. The proj ect cross-fertilizes three critical areas: (i) ion-trap development, pushing towards segmented ion traps with low heating rates; (ii) efficient compilation of quantum algorithms into low-level instruction circuits for...
Functional Coverage is a mechanism used in digital integrated circuits functional verification to measure whether the executed test set covered the declared functionality. It helps to examine test scenarios, by providing metrics that give information about the testcase or design-under-test (DUT) reached states (coverage points). SystemVerilog language provides dedicated syntax to make it possible,...
This paper presents a verification architecture of the Bluetooth Low Energy Link Layer Controller. The tested controller is a hardware implementation of the lower layers, described in the Bluetooth Low Energy Specification. The designed test bench uses a UVM methodology and constrained random verification techniques to meet the expected functional coverage metrics.
Recently, we are witnessing a rapid development in many fields of science, including medicine and healthcare. One of the visible results of such progress is an increasing average length of human life and the process of population aging. Advancements in sensor technology and wireless communication contributed to the development of the out-of-hospital health-monitoring concept [1]. One of its main advantages...
Experimental results of a fully integrated low ripple charge pump voltage converter are presented. The pump is a current mode voltage doubler with a novel parasitic capacitance precharge mechanism for output voltage ripple reduction. A prototype of the pump was designed and fabricated in 130 nm CMOS process. The pump supplied with 1.2 V delivers 1.5 V on its output. Despite reducing the size of the...
This paper presents the architecture of an improved charge pump high voltage converter. The converter's output voltage ripple has been reduced. Novel concepts were tested with the usage of 0.13 um CMOS technology simulations. The proposed charge pump input voltage is 1.2 V. The pump output voltage level is 6.69 V. The output voltage ripple amplitude is 16 mV.
We cordially welcome all the participants of DDECS 2012 in Tallinn. DDECS has been organized as a regional Central and East-European workshop until 2008, in 2009 it was upgraded to a symposium. Before 2012, it has been held in the Czech Republic (1995, 2002, 2006, 2009), Hungary (2001, 2005), Poland (1997, 2003, 2007), Slovakia (2000, 2004, 2008), Austria (2010) and Germany (2011). After the very...
Chronic rhinosinusitis with nasal polyps is observed in 1–4% persons during rhinoscopy. While the occurrence of their problems is connected with smell sense, still not enough attention is paid to the malfunctioning of their taste sense.The purpose of this study was estimation of taste sense functioning in patients with chronic rhinosinusitis with nasal polyps, treated with oral glucocorticosteroid...
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