The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
An electrostatic discharge (ESD) protection circuit with novel structure based on a silicon-controlled rectifier (SCR) is proposed for 5 V ESD protection of integrated circuits. The proposed ESD protection circuit has large current driving capacity due to its low on-resistance and high ESD robustness in comparison with the conventional SCR-based ESD protection circuit. The conventional SCR-based ESD...
This paper is proposed DC-DC Converter with DT-CMOS (Dynamic Threshold voltage MOSFET) Switch. The proposed circuit is evaluated and compared with CMOS switch by both circuit simulation and device simulation. DT-CMOS switch reduces the output ripple and the conduction loss through a low on-resistance. Therefore, proposed converter has a excellent performance efficiency than converter with conventional...
Small size and high performance LDO regulator using body driven technique is presented in this paper. The body driven technique can decrease threshold voltage (Vth) and increase the current ID flowing from drain to source in current. The technique is applied to the error amplifier, voltage buffer and pass transistor to reduce chip size and maintain the same performance as conventional LDO regulator...
This paper presents a novel silicon controlled rectifier (SCR)-based ESD protection devices for I/O clamp. The proposed ESD protection devices has a low trigger voltage and high holding voltage characteristics than conventional SCR. The proposed devices are fabricated by using 0.35um BCD (Bipolar-CMOS-DMOS) technology. From the experimental results, the device (PTSCR) for I/O clamp has a trigger voltage...
The proposed device has a high holding voltage and a high triggering current characteristic. These characteristics enable latch-up immune normal operation as well as superior full chip electro-static-discharge (ESD) protection. The device has a small area in requirement robustness in comparison to gate-grounded NMOS (ggNMOS). The proposed ESD protection device is designed in 0.25μm CMOS technology...
This paper presents the design of novel LVDS (Low-Voltage-Differential-Signaling) output buffer for Gb/sper-pin operation using 90 nm CMOS technology. The proposed LVDS driver is designed to reduce chip area, using a novel bipolar transistor switch. The proposed LVDS transmitter is operated at 1.8 V low-power supply. Its maximum data rate is 2.8 Gb/s approximately. Also, the new structural ESD (Electro-Static...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.