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A hardware architecture for the single iteration algorithm is proposed in this paper. Single iteration algorithm enables reconstruction of the full signal when small number of signal samples is available. The algorithm is based on the threshold calculation, and allows distinguishing between signal components and noise that appears as a consequence of missing samples. The proposed system for hardware...
An architecture for hardware realization of the Gradient algorithm for sparse signal reconstruction is proposed. Gradient algorithm is recently proposed and generally belongs to convex optimization class of algorithms. It is an iterative algorithm where missing samples are reconstructed by using a procedure of gradient-based concentration improvement. The proposed scheme assumes that sparse domain...
A multidistribution hardware for the realization of the Cohen class distributions is proposed. This approach is based on the modified form of kernel function that is computationally efficient and suitable for real-time implementation. The proposed solution includes various kernels based on the exponential and sine function, with the possibility of choosing different kernel parameters. The proposed...
A hardware realization of the ambiguity domain based time-frequency distribution is proposed in this paper. It represents a simplified version of the Cohen class distributions, which can be used in real-time practical applications with multicomponent signals. The reduction of cross terms is achieved using a suitable kernel function. The proposed hardware solution is realized in FPGA technology.
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