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An integrated frequency synthesizer for 28.733.7 GHz is presented. This wide tuning range is achieved at low phase noise by combining capacitive tuning and inductor switching in the voltage-controlled oscillator (VCO). The synthesizer lends itself to the realization of integrated transceiver frontends when using a sliding-IF architecture, both for the 28 GHz and the 38 GHz band. It occupies a chip...
A programmable frequency divider for fractional-N frequency synthesizers is presented. The input frequency range is from DC to 17GHz for divider ratios from 16 to 255. We show by analysis and time-domain simulations that the quantization noise folding in a fractional-N PLL can be reduced tremendously, if a prescaler between VCO and programmable divider can be avoided by using this high-speed divider...
A frequency divider providing quadrature outputs up to 30GHz is presented. Rms phase error and rms clock jitter are discussed in the context of OFDM systems, where the usual phase error correction in the digital baseband processor is included. A measurement technique for the static phase error between the in-phase and quadrature signal is proposed using an integrated single-sideband mixer in conjunction...
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