The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Pile as a type of foundation is a structure which can transfer heavy structural loads into the ground. Determination and proper prediction of pile bearing capacity are considered as a very important issue in preliminary design of geotechnical structures. This study attempts to develop several intelligent techniques for prediction of pile bearing capacity in cohesionless soil. To show the effects of...
Tunnel FETs (TFETs) as steep slope devices have attracted much attention for designing energy efficient digital systems at scaled supply voltages. In this paper, we propose a circuit/architectural co-design approach for designing reliable and energy efficient adder cells for new computing platforms at supply voltages as low as 0.1V. At circuit level, widely used XOR gates such as 6T and 8T designs...
Tunnel FETs have attracted much attention recently for energy efficient designs. This paper presents design, analysis and benchmarking of Tunnel FET (TFET) based reliable XOR logic gates with circuit co-design for energy efficient computing at scaled supply voltages (0.1–0.3V). A specific variant of TFET ie., homo-junction TFET (where source and drain are doped with same material InGaAs) has been...
This paper presents the design insights and performance benchmarking of Tunnel FET (TFET) based low voltage digital and analog circuits to enable self-powered (energy harvesting based) wearable SOCs for vital sign monitoring etc. This work addresses some important challenges faced by nano scale CMOS digital and analog circuit designers at low voltages. This work demonstrates how TFET's device level...
Tunnel FETs as steep slope devices have attracted attention for achieving energy efficiency at low supply voltages. This paper presents the design of Hetero-junction Tunnel FET (HTFET) based logic gates for static and dynamic logic topologies for the first time. Comparison is also done with 20nm Si FinFET technology with supply voltage scaling. Due to the steep slope characteristics, HTFET topologies...
This paper presents the design insights and benchmarking of 20nm Hetero-junction Tunnel transistor (HTFET) as steep slope device for designing energy efficient logic gates. 20nm Si FinFET technology has been used for benchmarking HTFET circuit performance. The HTFET logic topologies have improved robustness and energy efficiency over Si FinFET topology, particularly for small supply voltages. This...
In this paper the controlling mechanism for monitoring the environmental factors inside a polyhouse is proposed. By using this technique the ambient temperature and humidity can be controlled. These two factors are crucial for the plant growth inside a polyhouse. The prototype is designed by using AT89S52 microcontroller and tested successfully. The system can provide ideal temperature and humidity...
The design of various standard SRAM topologies with different technologies has been designed and tested for delay and power dissipation with respect to the different supply voltages. For this consideration, different topologies viz. 6T, 7T, 8T, 9T and 10T SRAM cells have taken. And these cells are designed using generic process development kit (gpdk) 45, 90 and 180 nm technologies. And all these are...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.