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This paper presents an X-band chirp radar transceiver with bandwidth reduction for range detection. The radar transceiver includes a super-heterodyne receiver including an ADC, a direct-digital synthesizer (DDS) based transmitter and a phase-locked loop (PLL) synthesizer. In a modified Weaver architecture, the down-converted baseband signal is further mixed with another chirp signal through stretch...
This paper presents an X-band direct digital synthesis (DDS) based chirp radar transmitter implemented in 0.13µm SiGe BiCMOS technology. The transmitter contains a quadrature DDS, two low-pass filters, an IF IQ modulator, a programmable gain amplifier (PGA), a RF mixer and a pre-amplifier. The DDSs, built with two digital-to-analog converters (DACs), generate two-channel IQ baseband chirp signals...
A 4.8–6.8GHz phase-locked loop (PLL) with a power optimized multi-modulus divider (MMD) for wireless and radar applications is presented in this paper. Based on the timing delay analysis and the self-oscillation frequency of the divider cells, the power consumption of the divide-by-two circuit (DTC) and divide-by-2/3 cells can be optimized, and thus minimum power consumption for divider chain can...
This paper presents an X-band chirp radar receiver with bandwidth reduction for range detection. The proposed receiver is composed primarily of a RF front end with reconfigurable bandwidth, a receiver baseband and an ADC. The receiver uses dual down-conversion architecture to convert the X-band chirp signal to the baseband signal, which is further mixed with a replica of the transmitted chirp through...
A quadrature 650 MHz direct digital frequency synthesizer (DDFS) with linear phase and frequency modulation capabilities is realized in a 130nm BiCMOS process. The DDFS supports stretch processing pulse compression for a single chip radar transceiver (RoC). The design features a partial dynamic rotation (PDR) Cordinate Rotation DIgital Computer (CORDIC) for the phase to sine and cosine mapping functions...
A single-chip X-band chirp radar transceiver with direct digital synthesis (DDS) for chirp generation is presented. The radar chip, including receiver, transmitter, quadrature DDS, phase-locked loop (PLL) and analog to digital converter (ADC), has been implemented in a 0.13μm BiCMOS technology. The stretch processing technique is employed to translate the time interval between the received and the...
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